Design and Performance Analysis of Charge Plasma Tunnel Field Effect Transistor (CP-TFET) for Digital, Analog, and RF Applications

Articles in Press

Document Type : Original Article

Authors

1 Department of ECE, KL University

2 DEpartment fo ECE, KL UNiversity

3 Department of Electronics & Communication Engineering,Koneru Lakshmaiah Education Foundation, Green Fields, Vaddeswaram, Guntur Dist,-522502,AP-India.

Abstract

In this paper, we propose and design for a Charged plasma tunnel field-effect transistor (CP_TFET).

This structure on intrinsic silicon are generated in this device, but they vary in terms of the technique

used to introduce charge carriers into the intrinsic silicon region. Under various conditions, The charge plasma TFET utilizes a metal work function, and our analysis focuses on the OFF-state current, aiming to minimize gate leakage and facilitate a meaningful device comparison. The SILVACO TCAD simulation is used in the study paper to examine the CP-TFET's properties. It looks at changes in RF parameters as well as DC analysis, looking at things like drain current, electric field, potential, energy bands, carrier concentration, trans-conductance, drain conductance, gate-to-source capacitance, and gate-to-drain capacitance. By altering the gate oxide thickness and gate length, spacer engineering is used to examine the parameters. The analysis encompasses radio frequency (RF), analog, and direct current (DC) parameters, showing that the charged plasma TFET has superior RF, analog, and DC properties. The occurrence of this phenomenon in the CP-TFET is attributed to the implementation of a lowered work function in the source-channel region.

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International Journal of Engineering

Articles in Press, Accepted Manuscript
Available Online from 16 March 2024

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